Intel Panther Lake vs Snapdragon X2 Elite vs AMD Gorgon Point — one chip is already pulling ahead in 2026's CPU war

Intel, Qualcomm and AMD are stepping into what will be a huge CPU war in 2026. Here's everything you need to know, and how ...
IEEE

On Internally Tagged Instruction Set Architectures

Abstract: Traditional instruction set architectures rely on instructions specifying data types to execute the correct operations, e.g., integer or floating-point addition. This duplication of ...
CNX Software

Linux 6.18 LTS release – Main changes, Arm, RISC-V, and MIPS architectures

Linus Torvalds has just announced the release of Linux 6.18 on the Linux Kernel Mailing List (LKML), which will likely become the next LTS kernel [update: it’s now official]: So I’ll have to admit ...
IEEE

Architectural Exploration and Performance Enhancement of the CVA6 RISC-V Core Using the Gem5 Simulation Framework

Abstract: As embedded devices continue to proliferate in applications ranging from IoT to edge computing, optimizing SoC architectures like CVA6 for performance and efficiency has become increasingly ...
Semiconductor Engineering

Roadmap for Open-Source Chiplet-Based RISC-V Systems For HPC and AI (ETH Zurich, Univ. of Bologna)

A new technical paper titled “Toward Open-Source Chiplets for HPC and AI: Occamy and Beyond” was published by researchers at ETH Zurich and University of Bologna. “We present a roadmap for open-source ...
Semiconductor Engineering

Shaping The Future Of AI Processors: A Tech Threads Conversation With Jim Keller

I had the pleasure of hosting renowned computer architect and Tenstorrent CEO Jim Keller, on the latest episode of Baya Systems’ Tech Threads podcast. If you haven’t already, listen to get his ...